Accompanying high functionality and miniaturization of electronic devices, high functionality, high speed operations, miniaturization and thinness are required of semiconductor devices such as semiconductor integrated circuit devices provided in the electronic devices.
Because of this, a semiconductor device having the following structure has been suggested. In the semiconductor device, a printed wiring board has a base material and a conductive layer is selectively formed on a main surface or inside the base material. The base material is made of insulation resin such as glass epoxy resin. The conductive layer is made of copper (Cu) or the like. A semiconductor integrated circuit element (hereinafter “semiconductor element”) is connected to the conductive layer in a flip chip (face down) state by using convex-shaped or projection-shaped outside connection terminals formed on a main surface of the semiconductor element. In addition, outside connection terminals such as spherical-shaped electrode terminals are provided on electrodes formed on another main surface of the printed wiring board.
In addition, a structure where plural electronic components such as semiconductor elements are provided on the wiring board has been suggested.
Furthermore, a so-called COC (Chip On Chip) structure where plural semiconductor elements having different functions are directly connected to each other via outside connection terminals has been suggested.
On the other hand, in order to reduce the thickness of a package where a semiconductor element is received (mounted), a semiconductor device having the following structure has been suggested. An opening is selectively formed in a printed wiring board so as to pierce the printed wiring board. A chip which is flip chip mounted on a board made of silicon (Si) or ceramic is received in the opening part. A cup-shaped cover is provided so as to cover the chip projecting from the opening part. See Japanese Laid Open Patent Application Publication No. 8-250653.
However, in the structure described in Japanese Laid Open Patent Application Publication No. 8-250653, the opening part corresponding to the chip is formed in the printed wiring board so as to pierce the printed wiring board. Because of this, the manufacturing cost of the printed wiring board is increased. In addition, there is a limitation of internal wirings in the printed wiring board so that the degree of design freedom may be degraded.
If the number of the wiring layers is increased in order to improve the design freedom degree of the wirings, the manufacturing cost is increased. In addition, the thickness of the printed wiring board is increased so that the size of the printed wiring board is made large. This causes large sizes of the semiconductor devices and therefore it may not be possible to meet requirements of small size and thinness.